Qualcomm Technologies Memory Accelerator

Memory accelerator configures the power-mode (corner) for the
accelerator.

Required properties:
- compatible:			Must be "qcom,mem-acc-regulator"
- regulator-name:		A string used to describe the regulator
- regulator-min-microvolt:	Minimum corner value as min constraint, which
				should be 1 for SVS corner
- regulator-max-microvolt:	Maximum corner value as max constraint, which
				should be 4 for SUPER_TURBO or 3 for TURBO
- qcom,corner-acc-map		Array which maps the APC (application processor)
				corner value to the accelerator corner.
				[0] maps APC SVS corner (1) to accelerator SVS corner
				[1] maps APC NOMINAL corner (2) to accelerator NOMINAL corner
				[2] maps APC TURBO corner (3) to accelerator TURBO corner

Optional properties:
- reg:				Register addresses for acc-sel-l1, acc-sel-l2 control, acc-en,
				MEM ACC eFuse address, acc-l1-custom and acc-l2-custom.
- reg-names:			Register names. Must be "acc-sel-l1",
				"acc-sel-l2", "acc-en", "efuse_addr",
				"acc-l1-custom", "acc-l2-custom".
				A given mem-acc-regulator driver must have "acc-sel-l1" or
				"acc-sel-l2" reg-names property and related register address
				property.
- qcom,acc-en-bit-pos		Array which specifies bit positions in the
				'acc-en' register. Setting these bits forces the
				the acclerator to use the corner value specified
				in the 'acc-sel-l1' and 'acc-sel-l2' register.
- qcom,acc-sel-l1-bit-size	Integer which specifies the number of bits in
				the 'acc-sel-l1' register which define each L1
				select parameter.  If this property is not
				specified, then a default value of 2 is assumed.
- qcom,acc-sel-l1-bit-pos	Array which specifies bit positions in the
				'acc-sel-l1' register. Each element in this array
				is the LSB of an N-bit value where 'N' is
				defined by the qcom,acc-sel-l1-bit-size
				property.  This N-bit value specifies the corner
				value used by the accelerator for the L1 cache.
- qcom,acc-sel-l2-bit-size	Integer which specifies the number of bits in
				the 'acc-sel-l2' register which define each L2
				select parameter.  If this property is not
				specified, then a default value of 2 is assumed.
- qcom,acc-sel-l2-bit-pos	Array which specifies bit positions in the
				'acc-sel-l2' register. Each element in this array
				is the LSB of an N-bit value where 'N' is
				defined by the qcom,acc-sel-l2-bit-size
				property.  This N-bit value specifies the corner
				value used by the accelerator for the L2 cache.
- qcom,l1-config-skip-fuse-sel:	Array of 5 elements to indicate where to read the bits, what value to
				compare with in order to decide whether to
				skip configuring the L1 accelerator or not while changing the APC corner
				and method to read fuse row, using SCM to read or read register directly.
				The 5 elements with index [0..4] are:
				  [0] => the fuse row number of the selector
				  [1] => LSB bit position of the bits
				  [2] => number of bits
				  [3] => the value to select skip L1 config logic
				  [4] => fuse reading method, 0 for direct reading or 1 for SCM reading
				When the value of the fuse bits specified by first 3 elements equals to
				the value in 4th element, L1 accelerator
				configuration logic is skipped. Otherwise, the original configuration sent
				from corner map should be applied. If the 5th element is 0, read the fuse row
				from register directly. Otherwise, read it through SCM.
- qcom,l1-acc-custom-data:	Array which maps APC corner values to L1 ACC custom data values.
				The corresponding custom data is written into the custom register
				while switching between APC corners. The custom register address
				is specified by "acc-11-custom" reg-property. The length of the array
				should be equal to number of APC corners.
- qcom,l2-acc-custom-data:	Array which maps APC corner values to L2 ACC custom data values.
				The corresponding custom data is written into the custom register
				while switching between APC corners. The custom register address
				is specified by "acc-l2-custom" reg-property. The length of the array
				should be equal to number of APC corners.
- qcom,override-acc-fuse-sel:	Array of 5 elements to indicate where to read the bits, what value to
				compare with in order to decide whether to
				apply override acc-map and custom data or not
				and method to read fuse row, using SCM to read or read register directly.
				The 5 elements with index [0..4] are:
				  [0] => the fuse row number of the selector
				  [1] => LSB bit position of the bits
				  [2] => number of bits
				  [3] => the value to select override ACC configuration
				  [4] => fuse reading method, 0 for direct reading or 1 for SCM reading
				When the value of the fuse bits specified by first 3 elements equals to the value
				in 4th element, overridden accelerator configuration logic is applied.
				Otherwise, the original configuration should be applied. If the 5th element is 0,
				read the fuse row from register directly. Otherwise, read it through SCM.
- qcom,override-corner-acc-map:	Array which overrides the existing acc-corner map (specified by qcom,corner-acc-map)
				with corner values specified in this property.
				[0] maps APC SVS corner (1) to accelerator SVS corner
				[1] maps APC NOMINAL corner (2) to accelerator NOMINAL corner
				[2] maps APC TURBO corner (3) to accelerator TURBO corner
- qcom,override-l1-acc-custom-data:	Array which overrides the existing l1-acc-custom data
				(specified by qcom,l1-acc-custom-data), with values specified in this property.
				The corresponding custom data is written into the custom register
				while switching between APC corners. The custom register address
				is specified by "acc-11-custom" reg-property. The length of the array
				should be equal to number of APC corners.
				This property can only be specified if the "qcom,l1-acc-custom-data" is already defined.
- qcom,override-l2-acc-custom-data:	Array which overrides the existing l2-acc-custom data
				(specified by qcom,l2-acc-custom-data) with values specified in this property.
				The corresponding custom data is written into the custom register
				while switching between APC corners. The custom register address
				is specified by "acc-l2-custom" reg-property. The length of the array
				should be equal to number of APC corners.
				This property can only be specified if the " qcom,l2-acc-custom-data" is already defined.

mem_acc_vreg_corner: regulator@fd4aa044 {
	compatible = "qcom,mem-acc-regulator";
	reg = <0xfd4aa048 0x1>, <0xfd4aa044 0x1>, <0xfd4af000 0x1>,
		<0x58000 0x1000>, <0x01942124 0x4>;
	reg-names = "acc-en", "acc-sel-l1" , "acc-sel-l2",
		"efuse_addr", "acc-l2-custom";
	regulator-name = "mem_acc_corner";
	regulator-min-microvolt = <1>;
	regulator-max-microvolt = <3>;

	qcom,acc-en-bit-pos = <0>;
	qcom,acc-sel-l1-bit-pos = <0>;
	qcom,acc-sel-l2-bit-pos = <0>;
	qcom,acc-sel-l1-bit-size = <2>;
	qcom,acc-sel-l2-bit-size = <2>;
	qcom,corner-acc-map = <0 1 3>;
	qcom,l1-config-skip-fuse-sel = <0 52 1 1 0>;
	qcom,l2-acc-custom-data = <0x0 0x3000 0x3000>;
	qcom,override-acc-fuse-sel = <0 52 1 1 0>;
	qcom,override-corner-acc-map = <0 0 1>;
	qcom,overide-l2-acc-custom-data = <0x0 0x0 0x3000>;
};
